1. Field of the Invention
This invention relates to comparator circuitry and more particularly to high speed digital comparator circuitry to determine whether a given binary value is within a selected range. The invention further relates to comparator circuitry used within cache memory systems.
2. Description of the Relevant Art
Comparator circuitry is widely used to perform particular functions within electrical systems. In some applications, comparator circuitry is used to determine whether a given value is within a selected compare range of values. A carry look-ahead algorithm is typically implemented to provide the comparison operation. In such applications, a pair of subtractors and a pair of equality detect circuits are used to perform the comparison for both the upper limit and the lower limit of the compare range. The inverted borrow output signals from each of the subtractors and the output signals from the two equality detect circuits are then logically ANDed to generate an output signal that indicates whether the given value is within the selected compare range.
A comparator circuit may be used, for example, within cache memory systems. Within such a system, the comparator circuit determines whether a received address corresponds to a non-cacheable memory location. For example, memory locations corresponding to input/output devices are typically non-cacheable. If the address is within the selected range, the comparator circuitry must generate a signal to prevent the activation of the cache memory. As a result of the increased speed of digital systems, the comparator circuitry must generate its output signal with very little delay.
It is therefore desirable to provide comparator circuitry that determines whether a given value is within a selected range and that operates with little delay to accommodate high speed operation of cache memory systems.